I. Field of the Disclosure
The technology of the disclosure relates generally to semiconductor devices, and particularly to the width of gates employed within semiconductor devices.
II. Background
Transistors are essential components in modern electronic devices. In particular, large numbers of transistors are employed in the design of each component in many modern electronic devices. For example, components such as central processing units (CPUs) and memory systems each employ a large quantity of transistors. In this manner, many electronic devices employ metal-oxide semiconductor (MOS) transistors, such as p-type MOS (PMOS) and n-type MOS (NMOS) transistors. Due to the prevalence of transistors in such components, performance of corresponding electronic devices is partially dependent on particular transistor design properties.
One transistor design property that affects the performance of electronic devices is the channel length of a transistor. For example, in MOS transistors, the channel is the portion of a transistor in which current flows in response to a voltage difference between a gate of the transistor and a source or drain of the transistor. MOS transistors continue to be designed with increasingly smaller channel lengths so as to achieve reduced area consumption. Such reduced area consumption of MOS transistors allows a higher density of MOS transistors to be employed in a particular area. Reduced channel length can also achieve reduced parasitic capacitance. Reduced parasitic capacitance reduces a resistor-capacitor (RC) delay of a MOS transistor, which reduces a signal delay of the MOS transistor. Additionally, reduced channel length can increase drive current (i.e., drive strength) corresponding to MOS transistors, because a reduced channel length reduces trap current associated with a capacitance between a gate and a channel region. An increased drive current can increase a switching speed of a MOS transistor, because the increased drive current can increase the rate at which the gate to source voltage ramps up to a threshold voltage of the MOS transistor.
However, as the channel length of MOS transistors decreases, the width of a corresponding gate is conventionally decreased to correspond to the reduced scaling achieved with the reduction in channel length. Because a gate is formed from a conductive material, a reduced gate width increases the resistance associated with the gate (i.e., gate resistance), as the resistance of a conductive material is inversely proportional to the conductive area of the conductive material. Increased gate resistance increases the RC delay of the corresponding MOS transistor. An increase in the RC delay of a MOS transistor causes the MOS transistor to switch more slowly, which, in turn, reduces the performance of the MOS transistor.
In this regard, it would be advantageous to employ transistors with reduced channel lengths for reduced area consumption, increased drive current, and reduced parasitic capacitance, while reducing or avoiding an increase in RC delay.